An engine control unit carries data that is not part of its application firmware: per-cylinder injector trim, knock thresholds, boost and EGR maps trimmed on the dyno, variant coding, and a rolling set of freeze frames. That block has to survive a re-flash, a battery disconnect in a service bay, and years of ignition cycles in a box that runs hot.
On this build the part holding it is the PUYA P24C32C-MSH-MER, a 32 Kbit I2C serial EEPROM in an 8-lead MSOP. It is a clean fit for the calibration store, and it decides whether bring-up takes an afternoon or a week.
Three datasheet numbers shape the design. The supply window is 1.7 V to 5.5 V, so the same part sits on a low-voltage sensor rail or a legacy 5 V rail without a level shifter. The ordering code grades it to +125 °C. And the self-timed write cycle tops out at 5 ms, which is a firmware number, not a hardware one. What the datasheet does not claim is AEC-Q100, so the electrical question and the qualification question must be answered separately.
Stage 1 Defining the electrical envelope
Start with what the block has to hold, because that sets the density before anyone opens a datasheet. A calibration image for a four-cylinder engine with one bank of maps, plus trim and variant coding, lands in the low single-digit kilobytes. Add freeze frames for the diagnostic stack and a shadow copy of the last known good calibration, and four kilobytes is the working number — comfortably inside a 32 Kbit part with 32 bytes per page.
The -MER suffix is the 125 °C grade, which is what an engine-bay-adjacent module normally asks for, but that does not make the part an automotive-qualified component.
Here is the envelope, straight from the datasheet.
| Parameter | Datasheet value | Source |
|---|---|---|
| Density and organisation | 32 Kbit (4 Kbytes), 32 bytes per page | p. 1 |
| Supply voltage VCC | 1.7 – 5.5 V (M option) | p. 1, p. 19 |
| Bus clock | 400 kHz and 1 MHz, from 1.7 V to 5.5 V | p. 1 |
| Temperature grade | –40 to +125 °C (E option) | p. 5, p. 19 |
| Read current | 0.2 mA typical at 400 kHz | p. 1, p. 5 |
| Write current | 0.8 mA typical at 400 kHz | p. 1, p. 5 |
| Standby current | 3 µA at 85 °C, 6 µA at 105 °C, 10 µA at 125 °C, VCC = 5.5 V | p. 5 |
| Self-timed write cycle | 5 ms maximum | p. 1, p. 6 |
| Endurance | 1,000,000 write cycles at 25 °C, 3.3 V, page mode | p. 1, p. 7 |
| Data retention | 100 years at TA = 55 °C | p. 1, p. 7 |
| Pin capacitance | 8 pF on SDA, 6 pF on SCL, E0, E1, E2 and WCB | p. 5 |
| Output low level | 0.2 V maximum at VCC = 1.7 V with IOL = 0.15 mA | p. 5 |
| HBM ESD | 4 kV | p. 1 |
| Latch-up | ± 200 mA at 25 °C | p. 1 |
| Write protect | WCB driven high protects the whole array | p. 3, p. 12 |
| Device addressing | E0, E1, E2 — eight devices on one bus | p. 3, p. 12 |
Two rows are easy to misread. The endurance figure is a page-mode number taken at 25 °C and 3.3 V, so a design writing at 125 °C cannot assume it. The retention figure is qualified at TA = 55 °C only, and the datasheet does not extend it to the top of the grade. The rest of the envelope is generous: at 1.7 V the part still clocks at 1 MHz, and standby only reaches 10 µA in the hottest grade.
Stage 2 Picking the part and reading the datasheet
The part number is six decisions stapled together, and the datasheet spells out every one. Read P24C32C-MSH-MER left to right: the 24C block means an I2C-compatible serial EEPROM, 32 is the density in kilobits, C is the device version, MS is the MSOP8 package, H is the plating callout for RoHS compliant, halogen-free and antimony-free, M is the 1.7 to 5.5 V option, E is the –40 to +125 °C grade, and R is tape and reel.
That decode matters before the purchase order goes out, because the same electrical part exists in every combination: eight package options and three supply options, with the wrong tail putting the right silicon on the wrong footprint.
Then step through the family, because the density question rarely stays settled. If the calibration block shrinks to a trim table, P24C02A is the same interface at 2 Kbit, or 256 bytes, with a different page size — 8 bytes per page instead of 32. The suffix still decides package and grade: P24C02A-DPH-MER is the PDIP8 in the 125 °C grade, while P24C02A-MSH-MKR, P24C02A-SSH-MKR, P24C02A-STH-MKR and P24C02A-TOH-MKR are the MSOP8, SOP8, SOT23-5 and TSOT23-5 versions in the –40 to +105 °C grade.
If the block grows instead, P24C64C is 64 Kbit, or 8 Kbytes, on the same 32-byte page, and adds a 6 kV HBM rating plus a WLCSP4 option. P24CM01 and P24CM01B go to 1 Mbit, or 128 Kbytes, with a 256-byte page. Page size, not density, is what changes your source code: a driver written for 32-byte pages still compiles against the larger parts and quietly writes the wrong addresses.
Migration from another I2C EEPROM is mostly a driver change rather than a board change. The same footprint carries over in the 8-lead bodies, but three things have to be re-checked: the page size, the device address — a fixed 1010b prefix with E2, E1 and E0 acting as hardware address pins rather than page selects — and the 5 ms self-timed write cycle that wants acknowledge polling instead of a fixed delay (p. 3, p. 6, p. 12).
Stage 3 Layout and bring-up traps
The schematic is short; bring-up is where designs go wrong. Five traps are worth walking through before the first board spins.
Pull-up sizing comes first. The datasheet's AC measurement conditions put the load at 1.3 kΩ for the 2.5 V and 5.5 V rails and 10 kΩ for 1.7 V (p. 6, p. 7), and the output stage changes with the rail beneath it: the part holds 0.4 V low while sinking 2.1 mA at a 3.0 V supply, but only guarantees 0.2 V low at 0.15 mA when VCC is 1.7 V (p. 5). A pull-up copied from a 3.3 V board is the classic reason a low-voltage build fails readback intermittently.
Second is the page boundary. Only the lower five data word address bits increment during a page write, so the higher bits keep the row location and any byte past the 32-byte boundary wraps to the start of the same page and overwrites what you just wrote (p. 14). A structure larger than 32 bytes written in one call will corrupt its own header.
Third is the completion signal. During the internal write cycle the part disables its inputs and does not answer until the write finishes (p. 13). A fixed delay appears to work, then fails at temperature, because the cycle is specified up to 5 ms rather than at 5 ms. Acknowledge polling finds the real end.
Fourth is the write control pin. WCB is pulled down internally, so a floating pin normally leaves writes enabled, but floating is not a decision. Tie it low for the normal write path, or drive it from a GPIO if service tooling must lock the calibration in the field; driving it high inhibits every write to the array (p. 3, p. 12).
Fifth is the power-up and brownout path, where a bench-passing board becomes a field return. The part has a built-in power-on-reset circuit, needs 70 µs from VCC minimum to being operational, and the datasheet asks firmware to wait 100 µs before the first command (p. 9, p. 11). The supply must rise no faster than 1 V/µs, inside a window of 1 to 500000 µs/V (p. 9). If a rail dips and recovers without the device being re-initialised, behaviour is not guaranteed: the datasheet asks for VCC to fall below VPWD, which is 0.7 V, and stay there for at least tPWD, which is 300 µs (p. 9).
One more item belongs in the bring-up notes. Reading the serial number is not a plain sequential read: bits A11 and A10 of the word address must carry a 1 followed by a 0 regardless of the address you intended, and reading from anywhere but the start of the block does not return a unique value (p. 17).
Stage 4 What carries into production
Three things follow the design into volume.
The first is the qualification conversation, and it is better had early. There is no AEC-Q100 claim anywhere in this datasheet. The 125 °C grade covers the temperature question, but if the ECU supplier expects a component-level automotive qualification file, this part cannot produce one. That is the decision that can send a design back to selection.
The second is what the endurance and retention numbers actually cover. Both are guaranteed by characterization and not tested in production (p. 7), and the timing tables carry the same footnote (p. 6). That is normal for a serial EEPROM, but it means lot-to-lot consistency is argued from characterization data and traceability rather than a per-unit screen — which is what the 128-bit serial number and the lockable Identification Page are for.
The third is the write budget over life. The calibration image is written rarely, so the freeze-frame log and the adaptation values accumulate the cycles. Cap how often firmware may rewrite the same page, and keep the log in its own page so a partial write cannot disturb the calibration. Then check retention against the top of the grade: the datasheet publishes 100 years at TA = 55 °C, so a lifetime statement over the full range needs data from the manufacturer, not arithmetic from the table.
Mechanically, the MSOP8 body measures roughly 3 mm by 4.9 mm on a 0.65 mm pitch (p. 27), and the parts arrive in tape and reel.
Frequently asked questions
What has to be on the purchase order for a first build?
The full code, P24C32C-MSH-MER, is the safe default: MSOP8 body, the RoHS, halogen-free and antimony-free plating callout, the 1.7 to 5.5 V option, the –40 to +125 °C grade and tape and reel. Each block is independently selectable, so a fixture that wants tubes instead of a reel, or a board pinched for height that needs the SOT23-5 footprint, takes a different tail on the same silicon.
What are the layout mistakes that cost a bring-up day?
Three, in order of frequency. A pull-up resistor sized for a higher rail, which kills readback at low VCC because the output stage only guarantees 0.2 V low at 0.15 mA when the supply is 1.7 V. A structure write that crosses the 32-byte page boundary and silently wraps. And a firmware delay standing in for acknowledge polling, which fails at temperature because the internal cycle is specified up to 5 ms. All three surface as intermittent data errors rather than a dead bus, which is why they take a day.
How consistent is the part from lot to lot?
Endurance, retention and the AC timing tables are characterised rather than screened per unit, the normal arrangement for this class of device. Keep the design inside the characterised window, use the lockable Identification Page and the 128-bit serial number to bind a unit to its record, and verify calibration readback at the temperature extremes rather than at room.
What are the alternatives if the calibration block grows?
Stay in the family and the interface does not change. P24C64C doubles density to 64 Kbit on the same 32-byte page and adds a 6 kV HBM rating and a WLCSP4 option. P24CM01 and P24CM01B go to 1 Mbit with a 256-byte page, which means fewer write calls but a new page size in the driver.
Sourcing note
The P24C32C-MSH-MER ships in tape and reel in the MSOP8 body over the –40 to +125 °C grade, at 32 Kbit with 32-byte pages on a 1.7 to 5.5 V supply. Send the projected annual quantity, the rail the part will sit on and the temperature grade the box actually sees, and we will quote from stock and confirm the lifecycle position, including any EOL or PCN notice for this grade — a calibration store outlives most part numbers.