An industrial HMI is a display, a touch panel, an Ethernet port and an MCU in a metal box on a DIN rail. The clock is one of the smallest line items on the board and one of the few that can stop the whole build: get the 25 MHz reference wrong and the PHY never links, whatever else is working.
This build uses the SiTime SIT8920BM-22-33E-25.000000E, a 25 MHz MEMS oscillator in a 3.2 by 2.5 mm four-pad package. It runs from a 3.3 V rail, holds ±25 ppm over its full range, and is rated from -55 to +125 °C. The temperature range is the reason it is here rather than a general-purpose oscillator: an HMI cabinet in a plant room in summer is not a benign place, and the backlight driver sits centimetres from the clock.
The part is a clean fit for the RMII reference and for the MCU clock input. It is not the right answer if the product needs AEC-Q100, and it is not the right answer if the board cannot spare 5 ms at power-up before the first clock edge arrives. Both of those are decisions to make in stage 1, not discoveries in stage 4.
Stage 1 Defining the electrical envelope
Start with the clock tree, not the oscillator. On this HMI the 25 MHz output feeds two loads: the RMII reference input of a 10/100 PHY and the external clock input of the MCU, which multiplies it up for the core and the display controller. That fixes three numbers before any part number is chosen.
Frequency and accuracy. 25 MHz exactly, because RMII is a 25 MHz bus and the PHY will not tolerate a divided or multiplied reference. Accuracy over life matters more than accuracy at 25 °C. The Ethernet budget is normally quoted as ±50 ppm, and the part in this build is graded at ±25 ppm. That leaves the PHY's own error and the board's load pulling inside the budget with margin.
Rail and load. The 3.3 V rail is already there for the PHY, so the clock shares it. The reference load is 15 pF, which is what the datasheet uses for every min and max limit. If the trace runs long or the clock feeds a second device, the load goes up and the edge slows down.
Thermal. The cabinet interior is the ambient, not the room. A panel with a backlight driver and a 3.3 V buck in the same volume sits well above the plant room temperature, and the ceiling on this part is far above anything the enclosure will reach.
Here is the envelope, from the SiT8920B datasheet, Rev. 1.01.
| Parameter | Datasheet value | Source |
|---|---|---|
| Output frequency range | 1 – 110 MHz, 6 decimal places | p. 1 |
| Frequency stability options | ±20, ±25, ±30, ±50 ppm | p. 1 |
| Operating temperature | -55 to +125 °C | p. 1 |
| Supply, 3.3 V option | 2.97 – 3.63 V | p. 1 |
| Supply current at 20 MHz | 3.8 mA typical, 4.7 mA maximum | p. 1 |
| Standby current | 2.6 µA typical, 8.5 µA maximum | p. 1 |
| Output enable disable current | 4.5 mA maximum | p. 1 |
| Duty cycle | 45 – 55 % | p. 1 |
| Rise and fall time at 15 pF | 1.0 ns typical, 2.0 ns maximum | p. 1 |
| Output high level | 90 % of Vdd | p. 1 |
| Startup time | 5 ms maximum | p. 2 |
| Enable and disable time | 130 ns maximum at 110 MHz | p. 2 |
| Resume from standby | 5 ms maximum | p. 2 |
| RMS period jitter | 1.6 ps typical, 2.5 ps maximum | p. 2 |
| RMS phase jitter, 12 kHz to 20 MHz | 1.3 ps typical, 2 ps maximum | p. 2 |
| Pin 1 pull-up when undriven | 10 kΩ or less | p. 2 |
| Decoupling capacitor | 0.1 µF or higher | p. 2 |
| ESD | 2000 V | p. 3 |
| Junction temperature | 135 °C maximum at 125 °C ambient | p. 3 |
| Thermal resistance, 3225 on four layers | 109 °C/W | p. 3 |
| Package | 3.2 x 2.5 mm | p. 1 |
The rows that decide the design are the 2.97 – 3.63 V window, the 5 ms startup, the 15 pF reference load and the 135 °C junction limit. Everything else is headroom.
Stage 2 Picking the part and reading the datasheet
The ordering code is eight decisions in one string, and the datasheet spells out each field.
| Field | Meaning in this part number |
|---|---|
| SiT8920 | Part family, high temperature MEMS oscillator |
| B | Revision letter |
| M | Temperature range, -55 to +125 °C |
| 2 | Frequency stability, ±25 ppm |
| 2 | Package size, 3.2 x 2.5 mm |
| 33 | Supply voltage, 3.3 V ±10 % |
| E | Pin 1 function, output enable |
| 25.000000 | Output frequency, 25 MHz to six decimal places |
| E | Packing, 8 mm tape and reel, 1 ku reel |
Read the tail first, because that is where a purchase order goes wrong. For the 3.2 x 2.5 mm body only two packing codes exist, 8 mm tape and reel in 3 ku or 1 ku, and this part carries the 1 ku option. The 12 mm and 16 mm reels belong to the larger packages.
The stability field is the one to argue about with the system architect. This part is graded at ±25 ppm, and that number already includes the initial tolerance at 25 °C, the first year of aging at 25 °C, and variation over temperature, supply voltage and a 15 pF load with ±10 %. It is a total budget, not a room-temperature figure. If the Ethernet link only has to come up, ±50 ppm is cheaper and sufficient; if the design has to hold a frequency reference for time stamping, keep the ±25 ppm grade.
Drive strength is the field most people ignore, and it changes the EMC result. The default setting gives a 1.0 ns typical rise and fall time into 15 pF on the 3.3 V rail. Into 45 pF the same setting slows to 2.6 ns, so a clock feeding two loads and a long trace wants a stronger drive code from the rise and fall tables, not a bigger series resistor.
Pin 1 is a factory option, not a strap you can add later. In the OE version, pulling it low puts the output in high impedance and leaves the die running; pulling it high enables the output, with 130 ns maximum enable time at 110 MHz, or 100 ns plus three clock periods at lower frequencies. In the ST version the pin drops the device into standby with a 5 ms resume. In the NC version it does nothing. Pick the behaviour at the schematic stage and order that letter.
The family around it splits on temperature and qualification, not on function.
The SIT8008BI-82-33E-3.570000 is the same idea in the -40 to 85 °C grade, at 3.5 mA typical from a 1.8 V rail, and the datasheet bills the family as a pin-to-pin drop-in replacement for a quartz XO. On an HMI that never runs hot internally, it is the cheaper clock on an identical layout.
The SIT8924BA-13-33E-8.000000 is the AEC-Q100 version, qualified from -55 to +125 °C with 4.0 mA typical from a 2.25 to 3.63 V rail, and it adds a 0.1 PPB/G acceleration sensitivity figure. The SIT8924BA-83-33E-8.000000 is the same qualified family at 8 MHz in the larger 5.0 x 3.2 mm body, for a design whose frequency is lower and whose area is not the constraint.
The SIT8008AC-12-33E-5.000000D shows the other end of the grade ladder: 5 MHz, ±20 ppm, and the commercial temperature code, which stops at 70 °C. The SIT8008AI-22-33E-8.000000D is the industrial version at 8 MHz, useful when an HMI variant needs a different pixel clock without a new board.
Stage 3 Layout and bring-up traps
Four traps account for most of the bring-up time.
The bypass capacitor is a requirement, not a suggestion. The datasheet asks for 0.1 µF or higher between Vdd and ground, and the note appears twice for a reason. Put it at the package with a short return to the ground plane. A 0.1 µF at the rail entry does nothing for a 1 ns edge.
Pin 1 must never float. If the pin is not driven, the datasheet asks for a 10 kΩ or smaller pull-up. A floating OE pin on a 3.3 V CMOS input invites an oscillator that starts sometimes and not others, and it will look like a firmware problem.
The startup window belongs in the boot sequence. Startup is 5 ms maximum from the rail reaching its minimum. An MCU that releases reset early and immediately configures the PHY is talking to a clock that is not there yet. The datasheet does promise no runt and no glitch pulses during startup, so the first edge is a real edge, but it arrives late.
Thermal headroom is real but not infinite. The junction limit is 135 °C at 125 °C ambient, and the 3225 body sits at 109 °C/W on a four-layer board. The part dissipates little, but an oscillator stacked next to the backlight boost converter is measuring the converter, not the clock.
Two more items before the board goes out. The land pattern is drawn for the 3.2 x 2.5 mm body, and the pad geometry matters: do not route signals under the part, and keep the ground pour continuous beneath it.
Then there is edge rate against emissions. The datasheet quantifies the trade: slowing the edge from 5 % of the period to 45 % of the period cuts the eleventh harmonic by 35 dB. If the HMI fails a radiated emissions scan with the default drive strength, try a slower drive code before a ferrite bead.
Stage 4 What carries into production
Packing and the line. The 1 ku reel of 8 mm tape is enough for a pilot run and not for a month of production, so the purchasing conversation belongs before the first build.
Moisture and reflow. The part is MSL1 at 260 °C, which means no bake and no dry-pack clock, and it is tested to MIL-STD-883 shock and vibration plus JESD22 temperature cycling.
Test coverage. Frequency, supply current and output swing are the three measurements worth putting on the ICT fixture. Frequency at 25 °C confirms the part was not swapped for a different stability grade; current catches a wrong drive code; swing catches a load that is heavier than the budget assumed.
Consistency across lots. The stability figure is a total budget that includes aging and temperature, so a unit measuring inside ±25 ppm at room temperature proves little on its own. Log the measured frequency per serial number and watch the distribution.
Lifecycle. This is a factory-programmed part, ordered to a specific frequency and grade. The family also exists as field-programmable devices, which is how a prototype gets built in a day, but production should be ordered to the exact code. If the design later needs AEC-Q100, the SiT8924 family is the same footprint and the same 25 MHz conversation.
Frequently asked questions
How long does a sample take to arrive?
The datasheet supports instant samples through the field-programmable route for the family, and factory-programmed parts are built to the ordering code. For a first article, order the exact code rather than an FP device, so the stability grade and the packing match what production will receive.
What are the most common layout mistakes with this part?
A bypass capacitor placed away from the package, pin 1 left floating, and a land pattern copied from a quartz oscillator of a different body size. All three are visible in a design review and all three produce intermittent behaviour rather than a clean failure.
Does the part stay consistent from unit to unit?
The ±25 ppm grade is a total budget covering initial tolerance, first year aging, temperature, supply and load. Two units from different lots will not read the same frequency at room temperature, and they are not supposed to; what matters is that both stay inside the budget over the product's life.
What can replace it if the design changes?
Down in temperature, the SIT8008BI-82-33E-3.570000 covers -40 to 85 °C in the same footprint. Up in qualification, the SIT8924BA-13-33E-8.000000 is AEC-Q100 rated. Neither is a drop-in for the frequency, so a replacement also means re-checking the PLL settings.
Sourcing note
Send the frequency, the stability grade, the rail and the annual quantity, and we will quote the SIT8920BM-22-33E-25.000000E against datasheet Rev. 1.01, with the packing code confirmed on the order. If the design may need the AEC-Q100 variant later, say so now: the footprint is the same, and the sample set can cover both.