An HVAC thermostat has three distinct piles of state to keep alive through power cuts: the installer's calibration and configuration, the user's schedule, and the fault log the service technician reads when the heat stops working. The 24CW family covers all three piles with one protocol, one driver and one pinout, in four densities from 16 to 128 Kbit. That makes it a natural three-tier plan rather than a part-number debate, and the tier you pick is decided by whether the log exists at all.
The 24CW1280-I-ST is the middle tier and the one most thermostats should land on. It is a 128 Kbit I2C EEPROM organized as 16,384 x 8, which the datasheet breaks into 512 pages of 32 bytes each (p. 1, p. 8). It runs from 1.6 to 5.5 V, talks the industry-standard two-wire protocol at 100 kHz, 400 kHz or 1 MHz, and carries a software write protection scheme that can lock the upper quarter, half, three quarters or the whole array (p. 1, p. 22). The -ST suffix is the 8-lead TSSOP body with a 4.4 mm package outline, industrial temperature from minus 40 to plus 85 °C, standard tube or tray packaging (p. 48).
Tier one is the 64 Kbit 24CW640 for units that only keep calibration and settings, tier two is this 128 Kbit part for units that also keep a fault log, and tier three is the same 128 Kbit density moved into the smallest packages with its configuration registers permanently locked, for platforms that ship in the millions and need both board area and tamper resistance. The protocol, the page size, the write cycle and the endurance budget are identical across all three tiers, which is why the decision can wait until the firmware team states how much state actually needs to survive.
Three tiers inside one product line
| Item | Tier 1, 24CW640 | Tier 2, 24CW1280-I-ST | Tier 3, 24CW1280 small-body |
|---|---|---|---|
| Density | 64 Kbit, 8192 x 8 | 128 Kbit, 16384 x 8 | 128 Kbit, 16384 x 8 |
| Pages of 32 bytes | 256 pages | 512 pages | 512 pages |
| Supply range | 1.6 to 5.5 V | 1.6 to 5.5 V | 1.6 to 5.5 V |
| Bus speed options | 100 kHz, 400 kHz, 1 MHz | 100 kHz, 400 kHz, 1 MHz | 100 kHz, 400 kHz, 1 MHz |
| Page write | 32 bytes | 32 bytes | 32 bytes |
| Write cycle, self-timed | 5 ms maximum | 5 ms maximum | 5 ms maximum |
| Endurance | 1,000,000 cycles | 1,000,000 cycles | 1,000,000 cycles |
| Data retention | past 200 years | past 200 years | past 200 years |
| Write protection zones | upper 1/4, 1/2, 3/4, all | upper 1/4, 1/2, 3/4, all | upper 1/4, 1/2, 3/4, all |
| Devices per bus | up to 8 | up to 8 | up to 8 |
| Packages | SOIC, TSSOP, SOT-23, UDFN, CSP | TSSOP under this order code | SOT-23, UDFN, 4-ball CSP |
| Temperature | minus 40 to plus 85 °C | minus 40 to plus 85 °C | minus 40 to plus 85 °C |
The family table reads flat on purpose. Every electrical parameter a driver depends on is shared, so the tiers differ only in how much state the unit commits to keeping and how much board the part is allowed to occupy (p. 1, p. 48).
What each tier buys you
Tier one buys the installer map and nothing else. A 64 Kbit device holds 8192 bytes in 256 pages, and a thermostat's configuration block is a fraction of that: setpoints, hysteresis, sensor trim, relay options and a schedule table all land comfortably, with room left for a short list of latched faults. The orderable parts here are the 24CW640-I-SN in the narrow 3.90 mm SOIC body and the 24CW640-I-ST in the 4.4 mm TSSOP, with the 24CW640T-I-OT offering the same density in a 5-lead SOT-23 on tape and reel when the board is a single layout with no header space to spare (p. 1, p. 48). Tier one is also the cheapest way to put a second EEPROM on the bus, because the three hardware address bits let up to eight devices share one two-wire pair (p. 2, p. 8).
Tier two buys the fault log. Doubling to 128 Kbit doubles the page count to 512, and pages are the unit that matters: a page write cannot cross a physical page boundary, and an attempt wraps around to the start of the current page instead of continuing, so firmware that logs one event per page avoids the wrap hazard entirely (p. 13). Endurance is quoted at 1,000,000 write cycles at 25 °C and retention past 200 years at 55 °C, specified through characterization and qualification rather than screened per unit (p. 5). A service log that appends a 16-byte record per fault and rotates through a few hundred pages will outlive the relays around it. The 24CW1280-I-ST ships in TSSOP for automated assembly, and the 24CW1280-I-SN is the same die in narrow SOIC if the contract manufacturer's stencil set prefers it (p. 48).
Tier three buys area and production security together. The 24CW1280T-I-OT drops the 128 Kbit array into the 5-lead SOT-23 body on tape and reel, the family also offers an 8-pad UDFN measuring 2 x 3 x 0.5 mm and two 4-ball CSP options for the tightest layouts (p. 1, p. 48). What separates tier three from a plain package swap is the configuration registers: the Write Protection Register and Hardware Address Register can be permanently locked once set, which prevents any later change to the protection zones or the bus address, and that is worth doing when the unit ships in volume and field tampering is a warranty question rather than a hypothetical (p. 2, p. 8).
Why this part sits where it sits
The 24CW1280-I-ST earns the middle slot on three arguments. The first is the log itself. A thermostat that never records faults can be tier one, but the moment the service model depends on reading back why a compressor short-cycled, 8 KB of tier one starts looking like a design compromise made for a price point nobody asked about. The 32-byte page matches a fault record format naturally, and sequential reads run continuously through the block with the address pointer rolling over at the top of the array (p. 1, p. 19).
The second is the supply window. Thermostat boards run from whatever the transformer and regulator chain produces, and this family spans 1.6 to 5.5 V across the entire speed range, so the same EEPROM sits next to a 1.8 V microcontroller today and a 5 V one on the cost-down variant without a respin (p. 1, p. 4, p. 5). Input thresholds scale with the rail, the output slope control limits ground bounce on the SDA line, and the Schmitt trigger inputs buy noise margin in an enclosure that shares a board with relays and a triac, and ESD protection on all pins is greater than 4 kV, enough for assembly handling while a board whose bus leaves the enclosure still earns its own TVS review (p. 1, p. 4).
The third is power behavior during the faults it is logging. Standby current is 0.5 µA maximum at 1.8 V and 1 µA maximum at 5.5 V, read current is 0.3 mA maximum at 1.8 V and 400 kHz, and the self-timed write cycle draws at most 1 mA for 5 ms (p. 1, p. 4). When the thermostat loses power mid-write, the power-on reset circuit holds the bus inactive until the rail is stable, the host must wait at least 100 µs after a stable rail before the first command, and a brownout that dips below the 1.5 V maximum reset threshold should be followed by a full power cycle of at least 1 ms before restarting (p. 6). A partially written record is a known, bounded event rather than a corrupted map, and the write protection register keeps the installer block off limits while the log area stays writable (p. 22).
One packaging note belongs here. The order code breaks down as 24CW1280 for the 128 Kbit density with hardware slave address preset to 000, I for the industrial range, and ST for the TSSOP body; the T inserted after the density marks tape and reel, so the 24CW1280T-I-ST is the same part on reels for the pick-and-place line while the plain -I-ST arrives in tube or tray (p. 48, p. 9).
The upgrade path when requirements move
Upgrades inside the plan are firmware work, not hardware work, as long as the footprint was chosen with the move in mind. Moving from tier one to tier two means switching the 24CW640 for the 24CW1280 in the same body code, and because the device address byte, the page size, the write cycle and the protection register all behave identically, the driver changes its array size constant and the log module turns on (p. 8, p. 22). The SOIC and TSSOP bodies each exist in both densities under matching suffixes, so the 24CW640-I-ST to 24CW1280-I-ST move is a drop-in on the same land pattern.
Downgrades cost what you would expect: the tier one device holds half the pages, so a log that was rotating through 512 pages now rotates through 256, and the fix is shortening records or accepting a shorter history, not rewriting the logger. What a downgrade does not lose is the protection scheme, the addressing scheme or the endurance rating, which stay put across the family (p. 5, p. 22).
The path upward from tier two is not more density, because 128 Kbit is the top of the family. When a platform outgrows it, the honest answers are a second device on the same bus using another hardware address, or a denser memory class entirely; eight devices may share the two-wire pair, so the bus itself has room before the board does (p. 2, p. 8). For most thermostat programs that ceiling is far away: 512 pages of 32 bytes is a long fault history by any service manual's standard.
Pull-up sizing is the one external design decision, and the datasheet gives it directly: about 10 kiloohm for 100 kHz operation and 2 kiloohm for 400 kHz and 1 MHz operation (p. 7). Bus timing closes the checklist, with a 450 nanosecond output valid time, 500 nanosecond bus free time and 50 nanosecond spike suppression on both lines (p. 5).
Frequently asked questions
Can I move from the 64 Kbit tier to this one without changing the board?
Within the same body code, yes. The SOIC and TSSOP bodies exist across the density range with matching suffixes, so the 24CW640-I-ST and the 24CW1280-I-ST share a land pattern, and the driver change is an array-size constant (p. 48). The SOT-23 tier three parts are also density-matched if the upgrade happens on a small-body layout.
What does stepping down to the 64 Kbit tier actually lose?
Half the pages, so the fault history shrinks first. Settings, calibration and protection behavior are unaffected, because the protocol, the 32-byte page, the 5 ms write cycle, the endurance rating and the write protection zones are the same on both densities (p. 5, p. 22). The tier one part remains the right answer for units whose service model reads faults from the controller's own flash instead.
Where does the 128 Kbit tier sit on the same bus as other devices?
Comfortably. The three hardware address bits give up to eight devices on one two-wire pair, this part answers the address preset into its order code, and additional preset addresses are available through the Hardware Address Register or factory options (p. 2, p. 8, p. 9). A typical thermostat uses one EEPROM; a board that also logs energy metering can add a second without an address conflict.
What should a buyer confirm before ordering this exact suffix?
Three things: the body code, because TSSOP, SOIC, SOT-23, UDFN and CSP all exist in this family; the packaging code, because the plain -I-ST is tube or tray while the T-marked 24CW1280T-I-ST is tape and reel for production feeders; and the slave address digit, since the family ships with several presets and availability varies by region (p. 48). Minimum order quantity and lead time follow from those choices, so quote against the full suffix.
Sourcing note
The 24CW1280-I-ST is the 128 Kbit, industrial-range, TSSOP member of the Microchip 24CW family, with the 24CW1280-I-SN in narrow SOIC, the 24CW1280T-I-OT in SOT-23 on tape and reel, and the 64 Kbit 24CW640 tier available in matching bodies (p. 48). Tell us which tier your state map landed on, the packaging your assembly line feeds, and the annual volume, and we will quote against current stock.